A2 Review article, Literature review, Systematic review
Hold-In, Pull-In, and Lock-In Ranges of PLL Circuits: Rigorous Mathematical Definitions and Limitations of Classical Theory (2015)

Leonov, G. A., Kuznetsov, N., Yuldashev, M., & Yuldashev, R. (2015). Hold-In, Pull-In, and Lock-In Ranges of PLL Circuits: Rigorous Mathematical Definitions and Limitations of Classical Theory. IEEE Transactions on Circuits and Systems. Part 1: Regular Papers, 62 (10), 2454-2464. doi:10.1109/TCSI.2015.2476295

JYU authors or editors

Publication details

All authors or editors: Leonov, Gennady A.; Kuznetsov, Nikolay; Yuldashev, Marat; Yuldashev, Renat

Journal or series: IEEE Transactions on Circuits and Systems. Part 1: Regular Papers

ISSN: 1549-8328

Publication year: 2015

Volume: 62

Issue number: 10

Pages range: 2454-2464

Publisher: Institute of Electrical and Electronics Engineers

Place of Publication: New York

Publication country: United States

Publication language: English

DOI: https://doi.org/10.1109/TCSI.2015.2476295

Open Access: Publication channel is not openly available

Publication is parallel published: http://arxiv.org/abs/1505.04262

Free keywords: Analog PLL; capture range; cycle slipping; definition, Gardner’s paradox on lock-in range; Gardner’s problem on unique lock-in frequency; global stability; high-order filter; hold-in range: local stability; lock-in range; nonlinear analysis; phase-locked loop; pull-in range; stability in the large

Contributing organizations

Ministry reporting: Yes

Reporting Year: 2015

JUFO rating: 2